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[1489] - posted: 2015-01-20 21:59:38
Sorry for the couple day delay, I have had my hands full with a new 2 month old puppy running around the office. smile


Download Ziron 2.0.0.16


changelog:

Code:
20.01.2015: Ziron Assembler 2.0.0.16

  # Added bitwise operator "not" - ~<reg>
  # 2 Sample codes added by 0CodErr
  # Binary numbers are now supported. e.g. edi = 0b00000000000000000000001000000000;
  # Register not, or, xor, and assignments supported. e.g. eax != ecx; eax &= ecx; eax ^= ecx; eax |= edx;
  # Fixed inc/dec of global variables.
  # Fixed memory operands size sometimes producing wrong machine code. (Thanks 0CodErr for report)
  # Fixed inc and dec not working with variables. (Thanks 0CodErr for report)
  # Fixed missing fatal error for memory addressing.
  # Fixed a problem with stack alignment in 16 bit mode.
  # Fixed problem with consts being duplicated.


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[1511] - posted: 2015-01-23 22:19:27

Download Ziron 2.0.0.17


changelog:

Code:
23.01.2015: Ziron Assembler 2.0.0.17
  
  # Added compiler flag m2m_reg. e.g. #set m2m_reg true; (this will prevent preserving eax for mov m/m)
  # Assigning byte and word variables will use eax.
  # Improved macro parameter and variable subsystem.
  # Added directive mcall (call macro by name using current macro stack)
  # Added directive mpush (push values onto the current macro stack)
  # Fixed a bug with cdecl methods calling ret with parameter.
  # Implemented opcodes - enter, bswap, cmpxchg
  # Fixed plugins unable to access/express macro variables.
  # Fixed a bug with plugin interface function ziron_expect_token.
  # Implemented opcodes - pushf, pushfd, popf, popfd, rdtsc, rdmsr, rdpmc, rsm, xadd.
  # Fixed an issue with inline methods not outputting auto leave/ret. (Thanks 0CodErr for report)
  # Added intrinsic method $eval.
  # Fixed addresses corrupting due to const offset when no consts were assigned. (Thanks 0CodErr for report)
  # Added syntax <reg> = !<reg> and <reg> = ~<reg>.
  # Remove syntax <reg> != <reg and <reg> ~= <reg>.
  # Fixed 32 bit mode 16 bit register alu instructions. (Thanks 0CodErr for report)
  # Truncation warning occurs for binary input.
  # An error will occur when an invalid binary input has been written.
  # Added neg operator syntax -<reg>
  # Added 1 new sample by 0CodErr


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[1530] - posted: 2015-01-27 22:31:35

Download Ziron 2.0.0.18


changelog:

Code:
27.01.2015: Ziron Assembler 2.0.0.18

  # For performance reasons, instruction leave is used when cpu mode is below 686.
  # Added directive cpu. (default mode is 686)
  # Removed unnecessary stack balancing in methods with stack frame. (Thanks 0CodErr for report)
  # Implemented case statements.
  # Implemented try { } except (eax, edx) {} - compatibility with windows x32. (experimental)
  # Fixed assigning label to register.
  # Fixed a bug with opcode xchg. (Thanks 0CodErr for report)
  # Fixed global variable scale value offset.
  # Fix to memory operand with single register and scale.
  # Fixed undefined operand sizes not using the left operand size for memory assignments.
  # Enums now define the name as the type.
  # It is now possible to set the default increment of an enum by passing a parameter to the type.
    e.g. enum NAME: DWord (2) { ...
  # Fixed a bug with mpush causing macros to change parameter requirements.
  # Added intrinsic #align; - align current code to 2,4,8 boundary (dependant on architecture)
  # Added directive "optimise". e.g. #set optimise off;
  # Updated to allow spacing in syntax <type> [<reg>].
  # Fixed [<expr>] = [<expr>] (Thanks 0CodErr for report)


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[1566] - posted: 2015-01-31 04:30:26

Download Ziron 2.0.0.19


changelog:

Code:
31.01.2015: Ziron Assembler 2.0.0.19

  # Added sample "Adler32" by 0CodErr.
  # Assigning a string to an initialized array with divide the characters per item.
  # Added directive #set imm_roll <true/false>;
  # By default, imm values will no longer roll over. e.g. 1-10, 12 = 2 etc.
  # Added possibility of including variable address in base expressions. e.g. eax = [eax + @myvar];
  # Fixed <reg> as <type> for continuous typecasting.
  # Error is shown for base expressions not using base/index registers.
  # Mov operands with lower size operand 2 variable will try movzx instruction. 
  # Fixed movzx <reg>, <var>.
  # Fixed several errors for alu instruction size mismatches.
  # Fixed rot based instructions accepting cl as second operand.
  # Fixed macro "tokentext".
  # Fixed sizeof on arrays showing incorrectly.
  # eMacros that have zero or infinite params no longer require ().
  # Added "$_e('...');" - express text as a token.
  # Added "$_uniquelabel;" - return a unique text label.
  # Added "$handlemacro(...);" - move to next tokens and process a macro declaration.
  # Fixed high level comparison not correcting typecasting for signed/unsigned jump opcodes. (Thanks 0CodErr for report)
  # Added $mpop, $gmpush and $gmpop.
  # Possibility to assign macros directly to a macro variable (which is generated only once).
  # Fixed macro variables not being freed.
  # Renamed internal try except to __try __except. (replaced original with emacro)
  # Added sample "Spiral Matrix" by 0CodErr.
  # Fixed issue with local variables not reserving stack space. (related to "unnecessary stack balancing" fix)
  # Added $moveNextText macro function.
  # It is now possible for macro $if to compare 2 strings.
  # Added $peekNextText macro function.


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[1598] - posted: 2015-02-03 11:04:34

Download Ziron 2.0.0.20


changelog:

Code:
03.02.2015: Ziron Assembler 2.0.0.20
  
  # Fixed strings having garbage bytes added to initialized data. (Thanks 0CodErr for report)
  # Implemented instructions loop, loope/loopz and loopne/loopnz.
  # Possible to assign flag to identical flag for readability. e.g. sign_flag = sign_flag;
  # Added internal macro variable $_operand, which is passed to macro calls the assigning operand.
  # Fixed test <reg/m>, <imm> always testing as 0.
  # Case statements now supports full compare operations.
  # Compare will now swap operands if operand 1 is imm and operand 2 is register, memory/variable.
  # Case statements will now enforce state being first token and first jmp operation removed.
  # Added opcodes jecxz and jcxz.
  # Fixed forward jump operations outputting dword imm for short jump operations. (Thanks 0CodErr for report)
  # Possible now to have conditional statements that use flags. e.g. if (sign_flag == true) { ...
  # Added reserved keywords, carry_flag, parity_flag, adjust_flag, zero_flag, sign_flag, trap_flag, direction_flag and overflow_flag.
  # Added string special char x. e.g. 'my string\x0'
  # Added directive awd (always write data) #set awd <true/false>; - default: false
  # Corrected variables in base/index expressions were not activated.
  # Fixed value expression [@var]
  # Automatic movsx/movzx will now correctly use signed/unsigned opcode based on signed status of operand. (Thanks 0CodErr for report)
  # Added "int8" as data type.


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[1652] - posted: 2015-02-07 19:07:44

Download Ziron 2.0.0.21


changelog:

Code:
07.02.2015: Ziron Assembler 2.0.0.21

  # Fixed some jmp operations were using dword address for short jumps.
  # Possible to write direct address inside of base expression. e.g. [0x00402000] = ...
  # Fixed several compiler halt errors on assembling some mov instructions. (Thanks 0CodErr for report)
  # It is possible to declare local macro variables similar to a var. e.g. $my_label: eax++; goto $my_label
  # Local variables can now have same identifier as a global variables for the inner scope.
  # Conditional register assignment now supports - (neg) and ! (not)
  # Small fix to single variable base expressions. [@var]
  # Error will now display in imm_roll off when initializing data that is too large for variable.
  # Fixed data was written as the final data type size from #set bits <...>;  (Thanks 0CodErr for report)
  # Conditional statements will now receive a null flag $_operand (TOKEN_FLAG) type instead of TOKEN_EOF.
  # Indefinite repeat no longer requires semicolon at the end. e.g. repeat { // code }
  # Fixed cmp <reg8>, <variable/mem>
  # Fix Raw file linker did not check for far jump loop and jcc instructions. (Thanks 0CodErr for report)
  # Added crc32 sample by 0CodErr.
  # Added repeat if () statements.


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[1700] - posted: 2015-02-14 18:31:34

Download Ziron 2.0.0.22


changelog:

Code:
14.02.2015: Ziron Assembler 2.0.0.22

  # Added leap_year example by 0CodErr.
  # Fixed ALU instructions using 16 bit registers in 32 bit mode.
  # Rewrote and optimised inbuilt macro handler.
  # Correctly using sar/shr and sal/shl for signed/unsigned operands.
  # Added intrinsic $log2(...) and $log2i(...)
  # Register assignment expressions will show error when referencing assignment operand.
  # Case states now can use flag comparisons.
  # Added intrinsic $labelref() for forward declaration macro labels.
  # Fixed occasional compiler issue where peek status was lost causing compile issues.
  # Fixed a small issue with absolute label addresses.
  # Added "Fibonacci" sample by 0CodErr.
  # Fixed back jumps having 2 byte offset causing large jump.
  # Plain assembly will no longer be optimised.
  # Fixed case states not passing flag operand to macros.
  # Fixed word size values being truncated into bytes.
  # Fixed a small issue where method activator was referencing itself causing stack overflow.
  # Rewrote test and bt(s/r) instruction handlers.
  # Added "Factorial" sample by 0CodErr.
  # Fixed several opcodes such as div not allowing variable operand.
  # Fixed return handler register selector.
  # Register assignment will use operand 1 to check type/sign status.
  # Added intrinsic "defined" e.g. #if defined('WIN32') == true: ...
  # Registers support very basic assignment expressions using + and - e.g. eax = edx + ecx - ebx;
  # String name is now optional in program declaration. e.g. program PE32_CUI;
  # Added SSE instruction movsd <operand>, <operand>.
    Note: x86 instruction movsd still remains the same without params (new line is required)
  # Return will now accept expressions emulating eax = ....
  # Implemented instructions shld and shrd.
  # Instructions ret and retn are now synonymous.
  # Fixed instructions with 0 or more params always expecting a parameter.
  # Added parameter -listinstructions. e.g. Ziron.exe -listinstructions.
  # Optimised instruction evaluator.
  # It is now possible to goto <reg> and goto [<base/index exp>]
  # Implemented SSE instructions:
    movss, movntq, movapd, movaps, movdqa, movsqu, movlpd, movlpd, movlps, movhpd, movhps,
    movupd, movups, movnti, movddup, movdq2q, movhlps, movlhps, movntdq, movntpd, movntps,
    movmskpd, movmskps, movntdqa.
  # ALU instructions can now accept label addresses as second operand.
  # Now possible to use label offset as operand. "eax += label" = eax += offset
  # Fixed using @label as an operand for address. "eax += @label" = eax += address


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[1748] - posted: 2015-02-20 14:46:10
I am a little behind schedule, so please forgive me if I have missed any reported bugs.


Download Ziron 2.0.0.23


changelog:

Code:
20.02.2015: Ziron Assembler 2.0.0.23

  # Added conv_temperature example by 0CodErr.
  # Possible to initialize variables as variable addresses.
  # Fixed assigning 1,2 byte memory operands overriding mov register.
  # Fixed assignment referencing error for memory operands.
  # Fixed memory operands with scale adding unnecessary displacement.
  # Fixed ROT instructions not accepting word sized operand.
  # Rewrote ALU instruction handler.
  # Fixed sysint being incorrectly re-assigned as a unsigned type.
  # Fixed single param assembly instructions would cause error if semicolon was found.
  # Fixed small garbage text being written to initialized arrays in certain cases.
  # Fixed initialized array error with ansi strings.
  # Fixed calling local variables that have been declared as method pointers.
  # Fixed negative numbers causing invalid size error.
  # Fixed $repeat 0: still performing 1 iteration.
  # Fixed typo in $log2i intrinsic.


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